The AMD Ryzen 9 9950X and Ryzen 9 9900X Review: Flagship Zen 5 Soars - and Stalls
by Gavin Bonshor on August 14, 2024 9:00 AM EST- Posted in
- CPUs
- AMD
- Desktop
- Zen 5
- AM5
- Ryzen 9000
- Ryzen 9 9950X
- Ryzen 9 9900X
Earlier this month, AMD launched the first two desktop CPUs using their latest Zen 5 microarchitecture: the Ryzen 7 9700X and the Ryzen 5 9600X. As part of the new Ryzen 9000 family, it gave us their latest Zen 5 cores to the desktop market, as AMD actually launched Zen 5 through their mobile platform last month, the Ryzen AI 300 series (which we reviewed).
Today, AMD is launching the remaining two Ryzen 9000 SKUs first announced at Computex 2024, completing the current Ryzen 9000 product stack. Both chips hail from the premium Ryzen 9 series, which includes the flagship Ryzen 9 9950X, which has 16 Zen 5 cores and can boost as high as 5.7 GHz, while the Ryzen 9 9900X has 12 Zen 5 cores and offers boost clock speeds of up to 5.6 GHz.
Although they took slightly longer than expected to launch, as there was a delay from the initial launch date of July 31st, the full quartet of Ryzen 9000 X series processors armed with the latest Zen 5 cores are available. All of the Ryzen 9000 series processors use the same AM5 socket as the previous Ryzen 7000 (Zen 4) series, which means users can use current X670E and X670 motherboards with the new chips. Unfortunately, as we highlighted in our Ryzen 7 9700X and Ryzen 5 9600X review, the X870E/X870 motherboards, which were meant to launch alongside the Ryzen 9000 series, won't be available until sometime in September.
We've seen how the entry-level Ryzen 5 9600X and the mid-range Ryzen 7 9700X perform against the competition, but it's time to see how far and fast the flagship Ryzen 9 pairing competes. The Ryzen 9 9950X (16C/32T) and the Ryzen 9 9900X (12C/24T) both have a higher TDP (170 W/120 W respectively) than the Ryzen 7 and Ryzen 5 (65 W), but there are more cores, and Ryzen 9 is clocked faster at both base and turbo frequencies. With this in mind, it's time to see how AMD's Zen 5 flagship Ryzen 9 series for desktops performs with more firepower, with our review of the Ryzen 9 9950X and Ryzen 9 9900 processors.
AMD Ryzen 9 9950X and 9900X:
From a product launch perspective, AMD typically launches its Ryzen portfolio as follows: we get the desktop processors first, then the mobile chips, and usually, the workstation and server parts come a bit later. For the launch of its latest Zen 5 microarchitecture, AMD threw a curveball instead. Last month, AMD opted to first bring their mobile Ryzen AI 300 series to market, combining the full Zen 5 cores and compact Zen 5c cores. We did review the Ryzen AI 9 HX 370 mobile SoC, which gave us our first glimpse of how Zen 5 performs.
Fast-forward just over a week, and AMD dropped two of the four Zen 5-based desktop chips they announced at Computex 2024. AMD launched the Ryzen 7 9700X, an 8C/16T chip targeting the mid-range, and the Ryzen 5 9600X, a 6C/12T variant representing the entry-level; we also reviewed both of these. It also gave us our first look at how Zen 5 compares with the previous Zen 4 architecture and Intel's current 14th Gen Core series family.
Die shot of a Ryzen 9 (Zen 5) processor with 2 x CCDs
We have published a number of reviews and articles prior to today, including an in-depth look at the Zen 5 microarchitecture itself:
- The AMD Ryzen 7 9700X and Ryzen 5 9600X Review: Zen 5 is Alive
- The AMD Ryzen AI 9 HX 370 Review: Unleashing Zen 5 and RDNA 3.5 Into Notebooks
- The AMD Zen 5 Microarchitecture: Powering Ryzen AI 300 Series For Mobile and Ryzen 9000 For Desktop
- AMD Unveils Ryzen 9000 CPUs For Desktop, Zen 5 Takes Center Stage at Computex 2024
Focusing on the Ryzen 9 9950X and the Ryzen 9 9900X, aside from core count, core clock speeds, and price, the main difference between the Ryzen 9 pairing and the Ryzen 7 9700X and Ryzen 5 9600X is the number of active Core Complex Dies (CCDs) on each chip, which AMD has codenamed Eldora. For the Ryzen 9000 series, each CCD can support up to eight Zen 5 cores, with each CCD as standard (not X3D) coming with a 32 MB pool of L3 cache. Similarly, L2 cache is held at 1MB per CPU core for the desktop chips. AMD's latest Zen 5 core is built on TSMC's 4nm N4P node, which is a modest step up from Zen 4. Though outside of CPU cores/CCDs, AMD has opted to use the same I/O Die (IOD) as Ryzen 7000, which is manufactured on TSMC's 6 nm node.
AMD Ryzen 9000 Series Processors Zen 5 Microarchitecture (Granite Ridge) |
|||||||
AnandTech | Cores / Threads |
Base Freq |
Turbo Freq |
L2 Cache |
L3 Cache |
TDP | MSRP |
Ryzen 9 9950X | 16C / 32T | 4.3GHz | 5.7GHz | 16 MB | 64 MB | 170 W | $649 |
Ryzen 9 9900X | 12C / 24T | 4.4GHz | 5.6GHz | 12 MB | 64 MB | 120 W | $499 |
Ryzen 7 9700X | 8C / 16T | 3.8GHz | 5.5GHz | 8 MB | 32 MB | 65 W | $359 |
Ryzen 5 9600X | 6C / 12T | 3.9GHz | 5.4GHz | 6 MB | 32 MB | 65 W | $279 |
The Ryzen 9 9950X uses two CCDs for a total of 16 cores (32 threads), with a base frequency of 4.3 GHz and a turbo frequency of up to 5.7 GHz; this is similar to the previous Zen 4 based Ryzen 9 7950X, which also has a max boost clock of up to 5.7 GHz. The Ryzen 9 9950X also has 64 MB of L3 cache (32 MB per CCD), with a 170 Watt TDP.
For the Ryzen 9 9900X, AMD has actually lowered the TDP down to 120 W for their 12C/24T SKU compared to the previous generations' Ryzen 9 7900X, which has a 170 W TDP. Benefiting from Zen 5 cores, the Ryzen 9 9900X has a base frequency of 4.4 GHz and a turbo frequency of up to 5.6 GHz. The Ryzen 9 9900X also uses two CCDs on the die, which gives it 64 MB (2 x 32 MB) of L3 cache.
The Return of The PPM Provisioning Driver: But There's No 3D V-Cache, So Why?
Specifically relating to the Ryzen 9 9950X and the Ryzen 9 9900X, AMD has brought back their PPM Provisioning driver. The last time we saw the PPM driver was back in our Ryzen 9 7950X3D review, when AMD first introduced it alongside their first multi-CCD X3D processor. This chip was special because one (and just one) CCD came packaged with AMD's 3D V-Cache, which essentially adds a large slice of L3 cache (64 MB) on top of the existing 32 MB of L3 cache on that CCD.
The PPM driver is a fundamental element that works to ensure that the 3D V-Cache is fully utilized within games, which otherwise may inadvertently bypass the CCD with the extra cache. It works by parking the 'vanilla' CCD, so that the game is running solely on the cores from the CCD with the 3D V-Cache.
For the Ryzen 7000 generation, the PPM driver was only required on the X3D chips with multiple CCDs, such as the Ryzen 9 7950X3D. But that's not the case anymore, it seems, as AMD is deploying it for all multi-CCD Ryzen 9000 processors.
The AMD 3D V-Cache Performance Optimizer process running in the background (PPM provisioning)
The PPM Provisioning driver is bundled within the AMD chipset drivers (ver 6.0.6.28.910), along with the typical Promontory motherboard chipset drivers for AM5 motherboards. In tandem with Microsoft's Game Bar and Game Mode, the PPM driver operates when Game Mode is enabled. Once a game is detected to be running, the PPM driver parks up one of the CCDs, so this essentially means when gaming, the chip is running at half capacity unless a game intentionally spins up enough threads to require the second CCD. Microsoft has a comprehensive guide to its Provisioning packages, which details many of the benefits and scenarios where it can benefit performance. AMD is leveraging this in cooperation with Game Mode, which is enabled with the Ryzen 9 9950X and Ryzen 9 9900X.
AMD Ryzen 9 9950X in Task Manager with one CCD fired up while playing Company of Heroes 3
AMD has yet to firmly document why it is using the PPM Provisioning/3D V-Cache Optimizer with non-X3D chips from the Ryzen 9000 series. We have reached out to AMD for an answer, and they responded by stating that the core parking feature contains critical game processes in a single cache domain for the best gaming performance. While this is a technically accurate description of what the PPM driver is doing, it doesn't really answer the question of why multi-CCD Ryzen 9000 chips have been deemed to need this kind of help when the 7950X/7900X did not.
Our interpretation is that AMD has run into enough issues on the Ryzen 7000 series with games inadvertently straddling multiple CCDs, that they have decided it's better to bite the bullet and use the PPM driver here as well, even with the extra complexity it entails. PPM core parking on the Ryzen 9 9950X and Ryzen 9 9900X CPUs enables AMD to more forcefully consolidate all gaming demands within a single cache domain (single CCD), which would avoid the latency-induced performance penalty of threads messaging each other from opposing CCDs or trying to access the L3 cache from outside their own local CCD.
In essence, it would be all the same rationale for why AMD implemented the PPM driver for the Ryzen 7000X3D chips in the first place: due to the poor die-to-die latency, having game threads spread out over multiple CCDs is bad for performance. Though it does awkwardly suggest that the existing Ryzen 9 7900X/7950X processors are under-performing due to their loosely managed thread allocations, which in turn may be why AMD doesn't want to talk about the issue in any detail.
The other idea in flight is that because AMD is reusing their IOD and Infinity Fabric from the Ryzen 7000 series (just the CCDs are new), increased resource contention has forced AMDs hand. In other words, that Ryzen 7000 was fine, but the faster CPU cores on Ryzen 9000 are just fast enough to make for a significant problem that needs addressed. Either way the outcome for the Ryzen 9000 series is the same, but it paints Ryzen 7000 in a better light.
Game performance aside, the core parking feature also lowers the power draw and helps with thermal dissipation. So AMD will be seeing some fringe benefits besides just keeping games from accidentally strangling themselves by working across the CCDs.
AMD AM5 Chipset Comparison | |||||
Feature | X870E | X870 | X670E | X670 | B650E |
CPU PCIe (PCIe) | 5.0 | 5.0 | 5.0 | 4.0 | 5.0 |
CPU PCIe (M.2 Slots) | At Least 1 PCIe 5.0 Slot | ||||
Total CPU PCIe Lanes | 24 | ||||
Chipset PCIe Lanes (Max) | 4.0: 12 3.0: 8 |
4.0: 8 3.0: 4 |
4.0: 12 3.0: 8 |
4.0: 8 3.0: 4 |
|
USB4 | Mandatory (Discrete, Consumes 4 Chipset PCie 4.0 Lanes) |
Optional | |||
SATA Ports (Max) | 8 | 4 | 8 | 8 | 4 |
DDR5 Support | Quad Channel (128-bit bus) | ||||
Wi-Fi | Wi-Fi 7 (Discrete) | Wi-Fi 6E (Discrete) | |||
CPU Overclocking Support | Yes | ||||
Memory Overclocking Support | Yes | ||||
# of Chips | 2 | 1 | 2 | 2 | 1 |
Silicon | ASMedia Promontory 21 | ||||
Available | Expected Sept. 2024 | Expected Sept. 2024 | Sept. 2022 | Sept. 2022 | Oct. 2022 |
As we highlighted in our Ryzen 7 9700X and Ryzen 5 9600X review, the Ryzen 9000 series uses the AM5 socket, much like the Ryzen 7000 series does. While there's a wave of new motherboards based on the X870E and X870 chipsets coming to market, these aren't expected until September. All the current AM5 socket motherboards on the market, such as X670E and X670 models, are compatible with Ryzen 9000, so users don't need to wait. The incoming X870E/X870 motherboards and the current X670E/X670 use the same ASMedia Promontory 21 chipset, so the only difference is in the feature set.
The newer boards utilize new controllers such as Wi-Fi 7, not to mention that X870E/X870 also includes USB 4.0 support, which will be ubiquitous on all X870(E) boards, where it was previously only optional for X670(E) series boards. There will also be a requirement to feature at least one PCIe 5.0 NVMe slot, which will continue to be a mandatory inclusion. AMD also notes that motherboards based on both platforms "feature 44 total PCIe lanes," which would break down to 24 lanes from the CPU and another 20 lanes from the chipset.
Regarding pricing, the entire Ryzen 9000 series line-up is launching at a cheaper price than the counterpart from the Ryzen 7000 series it is replacing. The flagship Ryzen 9 9950X has an MSRP of $649, which is $50 cheaper than the Ryzen 9 7950X when launched back in 2022. The Ryzen 9 9900X is also $50 cheaper at launch than the Ryzen 9 7900X came at, with the 9900X having an MSRP of $499. Even going back to when AMD launched Zen 3 with the Ryzen 5000 series in 2020, AMD is consistently bringing prices down on each subsequent SKU, which shows AMD is even more competitive in pricing with each generation we've seen.
Now that AMD has launched the flagship Ryzen 9 chips, we can finally see how AMD's best Zen 5 desktop chips stack up against the competition.
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Bruzzone - Wednesday, August 21, 2024 - link
Note I have reworked this on missing a tier of distribution.Why $650 for 9950X and the answer is channel mark up and to cost loss offset Raphael R7K and Vermeer R5K discounting to clear channel inventories.
.
9950X = $216 from TSMC and TSMC makes approximately x3 over cost.
AMD 9950X high volume price is $325 suspect 3 M unit procurement estimated on AMD top 10 customers divided into suspect full run production. This high volume price supports OEM resale to secondary distributors. The mid volume price is $487 that would include volume retail. Low volume tray of 10, $1K < 10% and where MSRP = $649. So, a mid-volume buyer can make + 33%
9950X = $216, $325, $487, $649
9900X = $166, $250, $375, $499
9700X = $120, $180, $269, $359
9600X = $93 (about $28 over TSMC cost), $140, $209, $279
10 OEMs on a 3 million unit procurement $223 to $289 with a sliding discount on 9600X down to AMD cost for meeting their full run contract sales objective.
This appears to be how AMD product’s total revenue potential is dived between the primary stakeholders,
TSMC takes 28.25%
AMD takes 49% < costs where R&D is variable and earns net after tax.
Top 10 customers as PC suppliers and CPU master distributors take up to 22.6%
mb
ballsystemlord - Thursday, August 22, 2024 - link
Thanks!Bruzzone - Friday, August 23, 2024 - link
You're welcome, anytime, your inquiry caused me to consider the data more thoroughly. mbSilver5urfer - Tuesday, August 20, 2024 - link
Now that the dust has settled.I really appreciate AT reviews. And as always again, AT did a great job over the stupid HWU and GN's subpar reviews. Esp the videos on YT. Anandtech shows both the IPC gains in SPEC score but also translation failure on Windows, specifically mentioned how PPM ruins the CPUs. Most of the YT content is focusing on the here's the review guidelines and here's the game tests and here's some special workloads which they use a set of rendering techniques in Blender etc.
But Phoronix and AT have consistent written articles, AT here clearly showing the CCD interdie latency, that's the culprit here. AMD's poor choice of re-using the Zen 4 IODie is causing this alongside lack of IMC improvement. Many circulate BS such as AMD is using Mesh vs Ring, it's nonsense. The thing is AMD's CCD design since Zen 3 is using a hybrid of mesh and ring bus. Check Ian's article on that. So that's not the issue unless Zen 5 exclusively changed something big, which I doubt since this is just a revision of Zen 4.
RKL also had IPC gain but showed regression due to 14nm++ backport and 2C4T deficit and IMC regression. IPC SPEC does not always translate, AMD's major screw up is relying on a Software scheduler on top of the rehashed Zen 4 design causing this massive confusion.
Next is Power. This is never mentioned, the thing is AMD with Zen 5 went super conservative for some stupid reason and ruined the CPU boost and base clocks on all SKUs. Even the top bin dual CCD 9950X got that regression in base clocks. Basically AMD axed the TDP of the Zen 5 CPUs to match the Zen 4 lineup and killed the performance on these. I have always wondered why AM5 boards have tons of VRM but no CPU to utilize them, any X670E board VRM is capable of delivering over 350-400W of power to CPU but the AM5 PPT / Socket max is 250W top, maybe 270W if you push to extreme, so they are hard capped unlike Intel. AMD should have increased the AM5's socket power band to 300W to let them boost and unlock more performance. The 9700X is a massive L due to this huge power cut from 105W to 65W, they also nerfed 12C 9900X from 175W to 120W.
Also perhaps AMD wanted Zen 6 to shine brighter just like Intel Alder Lake, Intel killed LGA1200 with garbage RKL release and EOLed it to make the ADL look massive. Not that nefarious but in some extent AMD seems to take a page out of Intel. Esp given the fact on Intel's ARL lacking Hyperthreading cores and loss of Clockspeed from Raptor Lake (Disaster) 6.2GHz. And that gives AM5 to have Zen 6 with huge boost over Zen 4, 100% sure that Zen 6 will get new IODie and newer TSMC big node jump atop maybe a new chipset.
All in all AMD's Zen 5 is a real dissapointment, since AM4 triumph. AMD always delivered lot of performance all the way from Zen -> Zen + improving CCD, Clockspeed, IMC -> Zen 2 lot of changes to the CCD and IODie -> Zen 3 a totally new design and radical departure of NUMA system plus higher boost clocks -> Zen 4 decoupled a lot of baggage on IF links from Uclock / Mclock / IFclock to just 2 links as Uclock and Mclock and massive Clockspeed boost and super stable platform unlike Zen 3 / AM4's USB I/O issues, there also the GloFo's IODie caused a havoc, here its the not stable amalgamation of the older IODie with newer Zen 5 core. Turin will shatter performance because it won't be sandbagged by this weakpoint.
Shame since AMD lost a glorious chance to completely ruin Intel (They deserve at this point, killed Optane, ruined CPU desktop arena with Big little junk, absolutely insane California policies adoption, total disaster in 10nm delivery, hamfisting LGA1200 socket, CPU bending on LGA1700, Raptor lake failure... unending list, such as Gloo / NSO spyware / Unit 8200 sponsorship from Pat Gelsinger), AMD would have destroyed Intel but they chose not to.
That said if ARL performs better than Zen 5, that shame AMD will face would be totally deserving for ruining Zen5.
GeoffreyA - Tuesday, August 20, 2024 - link
I also think the reusing of Zen 4's I/O die is causing the latency issues. Something is suboptimal somewhere along line.As for the lowering of power, they certainly seem to have ample headroom to raise it, gaining performance. Perhaps they thought that Zen 4 was using too much and wanted to curtail it, to contrast favourably with Intel. Lowering power while raising IPC always pays off later. Perhaps it's got to do with the I/O die. Maybe they're laying the foundation for further widening of the core and reduction in frequency. Indeed, they made the decoder a two-by-four cluster but it is not doing much in Zen 5, diminished by the effect of the micro-op cache. Or perhaps they've made a chain of poor decisions.
AnitaPeterson - Thursday, August 22, 2024 - link
What I'd like to see now is a direct comparison to AM4.Specifically, to the AM4 SKUs that were most recently launched - from the 5700x 3D to the 5900XT.
Because AM4 is mentioned in the conclusion, but there's no direct testing to pit the two generations against each other.
jcc5169 - Thursday, August 22, 2024 - link
Are you going to publish AMD's response?jcc5169 - Friday, August 23, 2024 - link
Of course not. I wonder if Intel compensated the writer or this site.AnitaPeterson - Friday, August 23, 2024 - link
Which AMD response would that be? Genuinely curious.GeoffreyA - Friday, August 23, 2024 - link
https://community.amd.com/t5/gaming/ryzen-9000-ser...